Field of the Disclosure
The disclosure relates to structures and formation methods of chip package structures, and in particular to structures and formation methods of chip package structures including multiple semiconductor dies.
Description of the Related Art
A chip package structure not only provides chips with protection from environmental contaminants, but it also provides a connection interface for the chips packaged therein. As the demand for smaller electronic products grows, manufacturers and others in the electronics industry continually seek ways to reduce the size of integrated circuits used in electronic products. In that regard, three-dimensional type integrated circuit packaging techniques have been developed and put into practice.
Stacked packaging schemes, such as package-on-package (PoP) packaging, have become increasingly popular. As the name implies, PoP is a semiconductor packaging innovation that involves stacking one package on top of another package. A PoP device may combine vertically, for example, discrete memory and logic packages.
New packaging technologies have been developed to improve the density and functions of semiconductor devices. These relatively new types of packaging technologies for semiconductor devices face manufacturing challenges.